Job Description

Cadence Bangalore Post Silicon Electrical Validation Team hiring for multiple positions
Job descriptions as well as applications links are available at the links below.
NB: Please ONLY apply directly via the link below.
Design Engineer II (T2 grade: 2-3 years (with Btech) or 0-2 years (with Mtech) of experience in Post-Silicon Physical Layer Electrical Validation activities mandatory):
Link to Apply
https://lnkd.in/gRF7Kg3M
Lead Design Engineer (T3 grade: 3-5 years (with Btech) or 2-3 years (with Mtech) of experience in Post-Silicon Physical Layer Electrical Validation activities mandatory):
Link to Apply
https://lnkd.in/gUXe482g
Design Engineering Manager (T4 grade: 6-10 years (with Btech) or 4-8 years (with Mtech) of experience in Post-Silicon Physical Layer Electrical Validation activities mandatory):
Link to Apply
https://lnkd.in/gYMxyt5u